Apple Silicon Mac
Unified-memory budgets, quantization vs context, and when SSD swap kills tokens/s.
Apple Silicon Mac Local Model Benchmark: Fixed Tasks, Quantization, Context & Speed
A reproducible AI engineering lab: pick a hardware path, run a local model, then use the workbenches. Every guide ships with hardware specs, pinned versions, verification dates, downloadable configs, and failure boundaries—not an AI writing SaaS or a coding-tool review directory.
$ OLLAMA_FLASH_ATTENTION=1 OLLAMA_KV_CACHE_TYPE=q8_0 ollama run qwen2.5:14b # Disk weight: 9.0 GB | KV Cache (16K ctx, q8_0): 1.98 GB | Total: 11.7 GB NAME SIZE PROCESSOR CONTEXT qwen2.5:14b-instruct-q4 11.7 GB 100% GPU 16384 > Eval rate: 31.64 tokens/s (Zero SSD swap)
Three paths → one flagship guide + VRAM calculator each. Not four equal pillars. Maintain first: Local AI + Troubleshooting.
Unified-memory budgets, quantization vs context, and when SSD swap kills tokens/s.
Apple Silicon Mac Local Model Benchmark: Fixed Tasks, Quantization, Context & Speed
PCIe shared-memory spill, container GPU passthrough, and headroom vs desktop baseline.
NVIDIA PC Model Loading & VRAM Diagnostics: Spotting PCIe Shared-Memory Spillover
27W PD + cooler preflight, offline voice/vision box, honest 3B token rates.
Raspberry Pi 5 Offline AI Lab Box: Complete BOM, Power/Thermal Check & Step-by-Step Build
Local AI + Troubleshooting are actively maintained; Workflows maintain-only; Maker new posts frozen (existing kept). Click a card to filter guides.
100% client-side tools built to eliminate VRAM miscalculations, manual config edits, and silent runtime failures.
Weight file size != runtime memory. Break down quantized weights + KV cache + compute buffers against Mac Unified Memory, NVIDIA VRAM, and Pi 5 RAM.
Step-by-step root-cause trees (13 trees) for Container-to-Host networking, silent CPU fallback, post-HTTP-200 SSE drops, n8n timeouts, HTTP 403 CORS, R1 <think> loops, Pi 5 power/NPU/ALSA, and RAG vector dimensions.
Customize ports, paths, and model tags live in your browser across Docker Compose stacks, n8n workflow JSONs, Pi 5 scripts, and SSE clients.
Measured prompt eval and token generation speeds across Q4_K_M, Q5_K_M, and Q8_0 on unified memory—showing exactly when raising num_ctx triggers SSD swap degradation.
Why a 12GB RTX GPU silently drops from 48 tok/s to 4 tok/s without throwing an OOM error—and how to cross-check nvidia-smi against ollama ps.
Pin exact container image tags, map host bind mounts for SQLite & vector stores, run a 10-second pre-upgrade snapshot, and practice full rollback.
Test your local RAG pipeline with our downloadable ground-truth policy document—exposing silent num_ctx truncation, two-column PDF bleed, and hallucinated citations.
A production-ready n8n workflow that fetches RSS feeds, deduplicates URLs, classifies items via local Ollama with strict JSON output, and handles queue timeouts.
Solve the #1 self-hosted AI failure (`ECONNREFUSED` / `ETIMEDOUT` calling port 11434 from Open WebUI, n8n, or Dify) in three deterministic verification commands.
A practical customer support / issue triage pipeline comparing local Ollama vs cloud API cost, strict input truncation, and least-privilege credential scoping.
Build a self-contained offline AI station on Raspberry Pi 5 (8GB) with exact BOM specifications, power throttling diagnostics, and realistic setup time expectations.
A structured maker project teaching students how to combine deterministic threshold filtering with a local 3B model for plain-language hardware alerts.
Why simple HTTP status-code tables fail in streaming LLM apps: handling mid-stream SSE error events, proxy idle cuts, and max_tokens JSON truncation.
Why using DeepSeek-R1 for tab autocomplete ruins IDE latency—and how to pair R1-14B (for architectural reasoning with 4K <think> budget) alongside Qwen2.5-Coder-7B (for sub-250ms FIM edits).
Measured P95 Time-to-First-Token (TTFT), aggregate throughput, and VRAM pre-allocation on an RTX 4090 (24GB) under 1, 4, and 8 parallel workflow workers.
Never trust an LLM to do accounting math alone: extract structured invoice fields locally with Qwen2.5-14B, then verify `subtotal + tax === total` in a deterministic n8n Code node.
Automate pull request bug and security reviews on your own GPU using n8n and Qwen2.5-Coder-14B—complete with lockfile filtering, regex secret scrubbing, and scoped webhook tokens.
Understand what the 13 TOPS Hailo-8L NPU accelerates (28 FPS YOLOv8 vision at <2W) and what it does NOT (GGUF LLMs)—and build a zero-contention NPU Vision + CPU 3B LLM pipeline.
Why browser extensions and LAN web clients get HTTP 403 Forbidden from Ollama—and how to configure OLLAMA_ORIGINS, Host header rewrites, and Bearer token protection safely.
Why standard PDF text extractors return 0 characters on scanned contracts—and how to convert multi-page scanned PDFs into clean Markdown tables locally using pdftoppm (200 DPI) + Qwen2.5-VL-7B.
Let team members query internal PostgreSQL/MySQL databases in plain language using Qwen2.5-Coder-14B—backed by triple defense-in-depth guards so an LLM can never DROP, UPDATE, or dump your database.
Build a sub-2.5s latency air-gapped voice assistant on Raspberry Pi 5 (8GB): exact ALSA audio card bindings, ARM64 NEON Whisper model sizing, and sentence-streaming Piper TTS.
Fix the two most common post-setup local AI failures: Chroma/PGVector dimension mismatch errors after changing embedding models, and GPU VRAM staying 95% full when ollama ps shows zero models.
Tested on a 128GB LPDDR5X-8000 Strix Halo Mini PC (Radeon 8060S gfx1151): unlocking the 96GB unified VRAM pool on Linux 6.16+, tuning ROCm hipBLASLt vs Vulkan RADV, and why Qwen3-30B-A3B MoE hits 78.4 tok/s while dense 70B models cap at 6.2 tok/s.
Side-by-side edge hardware benchmark: when to use Raspberry Pi 5 + Sony IMX500 on-sensor NPU / Hailo-8 26 TOPS (4.8W–9.6W ultra-low power vision) versus Jetson Orin Nano Super 25W mode (102 GB/s LPDDR5 running Qwen3-4B & Qwen2.5-VL at 31.4 tok/s).
Connect n8n’s MCP Client Tool to local MCP Servers using Qwen3-8B / Qwen3-30B-A3B on Ollama: why exposing >5 MCP tools crashes 8B model accuracy, how `/no_think` cuts tool-routing latency by 84%, and how to enforce read-only allowlists and `maxIterations=5`.
Root-cause diagnostics and one-line verification scripts for three high-frequency new-hardware failures: Intel Arc B580 (12GB Xe2) silent CPU fallback in Docker, AMD Strix Halo deprecated `amdgpu.gttsize` caps, and NVIDIA DGX Spark (GB10 128GB) unified memory page-cache OOMs.
Unlock 475GB of Metal wired memory on a 512GB Mac Studio M3 Ultra to run full 671B DeepSeek-R1/V3 (4-bit) at 14.8 tok/s under 192W wall power, compare MLX vs llama.cpp on Qwen3-235B-A22B MoE (32.4 tok/s), and link two Macs via 80 Gbps Thunderbolt 5 RDMA/Bridge0.
Side-by-side GDDR7 benchmarks of RTX 5090 (32GB · 1,792 GB/s) and RTX 5060 Ti (16GB · 448 GB/s) across Qwen3-14B, Qwen3-30B-A3B MoE, and Qwen2.5-32B, testing Blackwell FP4 Tensor Cores and proving why capping RTX 5090 to 450W saves 125W while retaining 96.4% tok/s.
Benchmarking Intel’s 24GB Arc Pro B60 workstation GPU (single 24GB and dual-card 48GB Battlematrix) against AMD’s 640 GB/s Radeon RX 9070 XT (16GB gfx1201) across Qwen3-14B, Qwen3-30B-A3B MoE, and Qwen2.5-32B.
Root-cause diagnostics and copy-paste fixes for the four most common failures on RTX 5090 / 5080 / 5070 Ti / 5060 Ti (`sm_120`) and AMD RX 9070 XT (`gfx1201`): CUDA <=12.6 `no kernel image` errors, `FORCE_CUBLAS` 5x slowdown, PCIe Gen5 riser `Xid 79` bus drops, and RDNA 4 `INVALID_ISA` faults.
Hands-on benchmark of the NVIDIA DGX Spark (Grace Blackwell GB10 Superchip, 128GB LPDDR5X @ 273 GB/s, sm_121) in single-node and switchless 2-node 200GbE QSFP112 ConnectX-7 RoCEv2 cluster mode across Qwen3-30B-A3B, Llama-3.3-70B, Qwen3-Next-80B-A3B, and Qwen3-235B-A22B.
Benchmarking the single-slot-friendly 96GB GDDR7 ECC NVIDIA RTX PRO 6000 Blackwell (at 600W stock and 300W Max-Q power profile) against 1x/2x AMD Radeon AI PRO R9700 (32GB/64GB RDNA 4 gfx1201) across vLLM and llama.cpp (Vulkan RADV vs ROCm).
Side-by-side local LLM benchmark of the 16-inch MacBook Pro M5 Max (128GB unified memory @ 614 GB/s) vs M4 Max (128GB @ 546 GB/s), measuring how Apple’s new per-core GPU Neural Accelerators (Metal 4 TensorOps) slash 32K–64K prompt prefill TTFT by 3.4x in MLX and llama.cpp.
Step-by-step root-cause diagnostics and verified fixes for multi-GPU vLLM Tensor Parallel hangs (`iommu=pt`, PCIe ACS BAR1 P2P blocks), 2-node DGX Spark ConnectX-7 200GbE silent fallback to 1GbE TCP (`NET/Socket`), RoCEv2 MTU/GID errors (`ibv_modify_qp`), and multi-card AMD Radeon AI PRO R9700 RCCL deadlocks.
How to run full 671B and 235B sparse MoE models at 14–27 tok/s without a $10,000 Mac Studio or multi-GPU cluster: pinning MLA Attention & KV Cache onto a single 24GB/32GB GPU while streaming routed experts across 12-channel DDR5 EPYC RAM (~460 GB/s) using ik_llama.cpp (-ot) and KTransformers.
Completing the Blackwell discrete GPU benchmark matrix: why the 300W RTX PRO 5000 (72GB GDDR7 ECC · 1,344 GB/s) is the single-card sweet spot for 70B FP8 & 80B MoE, why the 256-bit RTX 5070 Ti (896 GB/s) hits 93% of RTX 5080 speed, and how Draft Speculative Decoding boosts coding throughput by 1.85x.
Benchmarking 2026 edge generative AI hardware across three power envelopes: NVIDIA Jetson AGX Thor T5000 (128GB Blackwell · 40W–130W), Raspberry Pi 5 + AI HAT+ 2 (Hailo-10H 40 TOPS with dedicated 8GB onboard LPDDR4X via hailo-ollama at ~3.2W NPU power), and Rockchip RK3588 6 TOPS NPU (rknn-llm).
Root-cause diagnostics and verified fixes for 50–65% Linux Auto-NUMA slowdown (`kernel.numa_balancing=0`) on EPYC/Xeon MoE servers, `ik_llama.cpp` `-ot` regex CUDA OOMs on 24GB/32GB GPUs, Raspberry Pi 5 AI HAT+ 2 (`Hailo-10H`) firmware conflicts, and RK3588 `rknn-llm` CMA allocation failures.
RTX Spark laptops/mini desktops (shipping since mid-October 2026) and Ryzen AI Max+ 400 "Gorgon Halo" mini PCs both promise "run 100B+ models locally". The real difference is not TOPS: it is ~300 GB/s vs ~273 GB/s memory bandwidth (decode speed), CUDA Tensor Cores vs RDNA 3.5 (prefill speed), and 128GB vs 160GB GPU-addressable memory (whether Qwen3-235B-A22B Q4 fits at all). This guide derives decode ceilings from published specs, marks every number as an estimate, and ships a script so you can replace our estimates with your own measurements.
The new 2nm M6 brings per-core GPU Neural Accelerators, a dual 16-core Neural Engine, and 153 GB/s (16GB) or 170 GB/s (24/32GB) of memory bandwidth. For local LLMs the decisive spec is the memory tier: 16GB is an 8B-class machine, 24GB is a 14B machine, and 32GB is the only tier that comfortably runs Qwen3-30B-A3B. The Neural Engine is not used by llama.cpp, Ollama, or MLX — buy for memory, not for NPU TOPS.
Qualcomm Snapdragon X2 Elite Extreme (80 TOPS Hexagon NPU · 18-core Oryon) and Intel Core Ultra Series 3 "Panther Lake" (50 TOPS NPU 5 · Arc B390 12 Xe3 cores on Intel 18A) dominate 2026 thin-and-light Windows AI laptops. For local LLMs, ignore the NPU TOPS sticker: standard llama.cpp and Ollama run on the integrated GPU, where X2 Elite Extreme’s 192-bit LPDDR5X-9533 bus (228 GB/s, up to 128GB) beats Panther Lake’s 128-bit LPDDR5X-9600 (153.6 GB/s, up to 64/96GB) by ~48% on token decode—while Intel’s XMX matrix engines fight back on prompt prefill and x86_64 compatibility.
You do not need an EPYC server or a $4,000 workstation card to run Qwen3-30B-A3B (18.6GB) or Qwen3-Next-80B-A3B (48.2GB) on a desktop PC. Upstream llama.cpp’s native `--n-cpu-moe N` (`-ncmoe N`) flag keeps 100% of attention layers and the Q8_0 KV cache inside your 12GB/16GB/24GB GPU while offloading only sparse MoE experts for N layers to dual-channel DDR5 RAM—delivering 46–55 tok/s on Qwen3-30B-A3B and 26–33 tok/s on Qwen3-Next-80B-A3B. We also model how 3GB-module GDDR7 refreshes (RTX 5070 SUPER 18GB & RTX 5080 SUPER 24GB, spec-estimate) shift the exact `--n-cpu-moe` threshold.
Apple’s native RDMA over Thunderbolt 5 (`rdma_ctl enable` in macOS 26.2+) and MLX’s JACCL backend (`mlx.launch --backend jaccl`) slash Mac-to-Mac latency from ~180 µs (TCP over Thunderbolt Bridge) to ~3 µs over 80 Gbps links—finally making Tensor Parallelism (TP) across 2 to 4 Apple Silicon Macs faster than single-node execution. We compare MLX JACCL, `exo`, and `llama.cpp` `rpc-server` on a 2× M5 Max (256GB) & 2× M3 Ultra cluster, document the 6-cable 4-node full-mesh rule, and model 2× Mac Studio M5 Ultra (512GB · 1.2 TB/s each, spec-estimate).
Compact SFF HomeLab servers (Minisforum MS-01, Dell Precision/OptiPlex SFF, 1U/2U shallow racks) cannot fit 300W triple-slot GPUs or auxiliary power cables. We benchmark the new wave of 70W slot-powered half-height workstation cards—NVIDIA RTX PRO 4000 Blackwell SFF (24GB GDDR7 ECC · 432 GB/s · 70W) and Intel Arc Pro B50 (16GB GDDR6 · 224 GB/s · 70W)—alongside Tenstorrent’s open-source RISC-V Tensix PCIe card, Blackhole p150a (32GB GDDR6 · 512 GB/s · 4× 800G QSFP-DD), comparing tok/s, tokens-per-watt (tok/J), ECC VRAM tax, and software compatibility (`llama.cpp` vs `tt-metal` / `vLLM`).
When deploying uncompromised 235B, 671B, and 1-trillion-parameter MoE models under a desk, architects face two paths: NVIDIA’s OEM liquid-cooled DGX Station GB300 (Grace Blackwell Ultra Superchip with 252GB HBM3e @ 7.1 TB/s + 496GB LPDDR5X @ 396 GB/s joined over a 900 GB/s NVLink-C2C bus = 748GB coherent pool) or a custom WRX90 tower built around AMD’s 96-core Ryzen Threadripper PRO 9995WX ("Shimada Peak" Zen 5, 8-channel DDR5-6400 RDIMM @ 365 GB/s sustained, 128 PCIe 5.0 lanes) and 1–2× RTX PRO 6000 Blackwell (96GB/192GB). We benchmark the WRX90 9995WX rig, model GB300 HBM3e vs LPDDR5X page placement, and compare against Mac Studio M3/M5 Ultra 512GB.
If you connect a desktop 24GB/32GB GPU to a Mini-PC or laptop via OCuLink (PCIe 4.0 ×4 · 64 Gbps), Thunderbolt 5 (80 Gbps tunneled PCIe 4.0 ×4), or USB4 (40 Gbps), how much local LLM performance do you lose vs an internal PCIe 5.0 ×16 slot—and how does an eGPU compare to an internal 24GB GDDR7 laptop GPU (NVIDIA RTX 5090 Laptop / RTX PRO 5000 Blackwell Mobile · 896 GB/s @ 175W)? We benchmark cold GGUF load times, 100% VRAM-resident decoding (98.5% parity!), CPU-GPU hybrid offload penalties over eGPU cables, and why multi-eGPU vLLM Tensor Parallelism collapses while llama.cpp --split-mode layer retains 93% speed.
How do you assemble 48GB to 192GB+ of dedicated accelerator VRAM under a desk without paying enterprise NVIDIA HBM prices? We benchmark two shipping non-CUDA workstation architectures and model Intel’s new inference-only accelerator: (1) Intel Arc Pro B60 Dual 48GB ("Project Battlematrix" — Maxsun / Sparkle dual-BMG-G21 dies on one dual-slot 400W PCB, scaling up to 4 cards / 8 GPUs / 192GB VRAM), including the critical PCIe 5.0 x8/x8 motherboard bifurcation requirement that silently hides 24GB if misconfigured; (2) Tenstorrent QuietBox 2 (liquid-cooled 2× Blackhole p300c = 4 Tensix ASICs · 128GB GDDR6 + 256GB DDR5 connected over internal 800GbE mesh); and (3) spec-derived sizing for Intel GPU D-Series "Crescent Island" (Xe3P · 160GB reference / 480GB ODM LPDDR5X @ 1.5 TB/s).
If you still size local LLM hardware using 2024–2025 dense Transformer KV-cache formulas, you will overestimate 128K-context memory by up to 4×! Three 2026 open-weight families rewrote the memory math: Alibaba’s Qwen3.5 (27B Dense, 35B-A3B & 122B-A10B MoE) replaces 75% of attention layers with constant-memory Gated DeltaNet linear recurrence; Google’s Apache-2.0 Gemma 4 (26B-A4B MoE & 31B Dense) pairs sliding-window layers with low-head global p-RoPE; and OpenAI’s gpt-oss-20b / 120b ships natively post-trained in ~4.25-bit MXFP4. We benchmark all three families on the new compact Mac mini M5 Pro (64GB Unified · 307 GB/s · Metal 4 GPU Neural Accelerators), a 16GB/32GB Blackwell GPU rig, and a 96GB/128GB workstation—and document the silent multi-turn DeltaNet state-drop bug in outdated MLX/llama.cpp builds.
Official 48GB–96GB workstation GPUs cost $4,500–$8,500, pushing HomeLab and on-prem builders toward three wildly different high-memory PCIe cards: FuriosaAI’s 2nd-gen RNGD ("Renegade") NPU (48GB HBM3 @ 1,500 GB/s in a 180W envelope via Tensor Contraction Processor), secondary-market clamshell-modded NVIDIA RTX 4090 48GB blower cards (24× 2GB GDDR6X @ 1,008 GB/s), and surplus Huawei Atlas 300I Duo 96GB boards (~$1,300–$1,800). We test all three side-by-side on Qwen3.6-35B-A3B, Qwen3-32B, and Llama-3.3-70B—exposing why RNGD delivers 2.6× higher tokens/sec per watt on compiled FP8 serving, why modded 4090 48GB cards cook their rear VRAM without a 350W power clamp, and why the Atlas 300I Duo’s "96GB" is actually two isolated 204 GB/s LPDDR4X dies without native BF16.
On almost every AMD Ryzen AI Max+ 395 ("Strix Halo") Linux box today, the 40-CU Radeon 8060S iGPU does 100% of the work while the 50-TOPS XDNA 2 NPU sits at 0%—meaning every IDE FIM tab-autocomplete, RAG rerank, or sub-agent call interrupts your main GPU stream or evicts a 40GB–75GB model! Tested on two flagship 130W–150W 128GB compact workstations—the Minisforum MS-S1 Max (onboard dual 10GbE + dual 80Gbps USB4v2) and the enterprise ECC-capable HP Z2 Mini G1a—we wire up Linux `amdxdna` (`/dev/accel/accel0`), FastFlowLM (`flm:npu`), ROCm 7.2 (`gfx1151`), and AMD Lemonade Server (`lemonade-server`) to run an always-on 8B helper model on the XDNA 2 NPU (`~6.8W`) simultaneously alongside Alibaba’s new agentic `Qwen3.6-35B-A3B` (`Q8_0`) or Meta’s `Llama-4-Scout-17B-16E` (`109B` MoE) locked in a 108GB unified GTT pool.
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All 48 guides and parameterized artifacts are regression-tested across 4 physical hardware environments.
Covers M3 Ultra (512GB), M5 Max (Metal 4), dual DGX Spark (256GB), EPYC 12-Ch DDR5 Hybrid & Strix Halo, measuring 671B / 235B MoE.
Spans 8GB–96GB GPUs (RTX PRO 6000 96GB / PRO 5000 72GB / PRO 4500 32GB, RTX 5090/5080/5070Ti, R9700 32GB & Arc Pro B60), benchmarking sm_120, speculative decoding & vLLM.
Verifies container-to-host bridge routing, MCP Server tool allowlists, read-only SQL AST sandboxes, invoice math reconciliation, and Git PR scrubbing.
Benchmarks NVIDIA Jetson AGX Thor (128GB 2070 TFLOPS), Jetson Orin Super, Raspberry Pi 5 AI HAT+ 2 (Hailo-10H 8GB NPU) & RK3588 NPU edge LLMs.